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Contended I/O: Difference between revisions
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Avoid confusion with Z80 HALT instruction, mention clock-stopping and {{overline|WAIT}} signal
(Add to Z80 category) |
(Avoid confusion with Z80 HALT instruction, mention clock-stopping and {{overline|WAIT}} signal) |
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When the [[Z80]] wishes to access an IO port, it places the port address on the address bus exactly as it does when accessing memory. On the 48K and 128K Spectrums, this causes delays to IO as the ULA | When the [[Z80]] wishes to access an IO port, it places the port address on the address bus exactly as it does when accessing memory. On the 48K and 128K Spectrums, this causes delays to IO as the ULA pauses the processor by stopping its clock, even when the ULA's I/O port is not the one being accessed. On the +3 Spectrum, no contention occurs as the +3 ULA applies contention only when the Z80's {{overline|MREQ}} line is active, which it is not during an IO operation. Two effects can occur here: | ||
# If the port address has its low bit reset, the ULA | # If the port address has its low bit reset, the ULA pauses the processor to supply the result using the {{overline|WAIT}} signal. | ||
# If the port being accessed is between 0x4000 and 0x7fff, this "looks like" an access to contended memory to the ULA and it again | # If the port being accessed is between 0x4000 and 0x7fff, this "looks like" an access to contended memory to the ULA and it again pauses the processor, but by stopping its clock. Contention is also applied if the port address is between 0xc000 and 0xffff on a 128K Spectrum with a contended RAM bank paged into that address range.<ref>http://www.worldofspectrum.org/forums/showpost.php?p=215386&postcount=88</ref><ref>http://www.worldofspectrum.org/forums/showthread.php?t=18214</ref> | ||
The combination of these two effects leads to the following pattern: | The combination of these two effects leads to the following pattern: | ||
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The "Contention pattern" shows the sequence of (non-)contention which occurs: an entry of "N:x" means that the Z80 simply continues for x | The "Contention pattern" shows the sequence of (non-)contention which occurs: an entry of "N:x" means that the Z80 simply continues for x T states, while "C:x" means that the Z80 is paused for the same number of T states as with a normal [[contended memory]] access, before continuing for x T states. | ||
== Notes == | == Notes == | ||