Talk:Contended I/O

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IMHO the "... the ULA halts the processor" is not the best phrase, because there is a HALT instruction in Z80 assembly, which really halt the CPU and the processor is halted while an interrupt arrived. Hmm... o.k. not exactly, because Z80 do NOPs to refresh memory.

This situation the ULA really stops CPU clock signal. pulls the "/WAIT" pin of CPU, and Z80 adds "empty" clock cycles while /WAIT is low. BTW: while Z80 waits, does not refresh the memory, so a long wait cycle can "erase" the DRAM... Szaszg (talk)

Thanks, Gergely! I've had a go at this. Unfortunately, I'm working from memory here. My recollection is that ULA I/O access is delayed using WAIT (note: I'm using {{overline|WAIT}} for WAIT in this Wiki, not /WAIT, !WAIT, ~WAIT or ¬WAIT :-)) but that the spurious I/O contention stops the clock. Please correct me if I'm mistaken. I don't quite get why access to ULA ports between 0x4000 and 0x7fff results in less contention than non-ULA access within that some range. We could do with adding a reference to Chris Smith's book here, although I don't currently have it. Zub (talk) 00:25, 3 June 2015 (UTC)
Hmm.. as I see, the WAIT pin of Z80 is not connected to ULA (e.g.: http://8bit.yarek.pl/computer/zx.48/2_sch.gif), so I think ULA has only one method to delay CPU: holds CPU clock signal at high level...szaszg (talk) 17:12, 10 June 2015 (UTC)