651
edits
Contended I/O: Difference between revisions
Jump to navigation
Jump to search
m
Arjun told me to delete this
m (Let's use HTTPS!) |
m (Arjun told me to delete this) |
||
| Line 1: | Line 1: | ||
When the [[Z80]] wishes to access an I/O port, it places the port address on the address bus exactly as it does when accessing memory. On the 48K and 128K Spectrums, this causes delays to I/O as the ULA pauses the processor by stopping its clock, even when the ULA's I/O port is not the one being accessed. | When the [[Z80]] wishes to access an I/O port, it places the port address on the address bus exactly as it does when accessing memory. On the 48K and 128K Spectrums, this causes delays to I/O as the ULA pauses the processor by stopping its clock, even when the ULA's I/O port is not the one being accessed. | ||
On the +3 Spectrum, no contention occurs as the +3 ULA applies contention only when the Z80's {{overline|MREQ}} line is active, which it is not during an I/O operation. | On the +3 Spectrum, no contention occurs as the +3 ULA applies contention only when the Z80's {{overline|MREQ}} line is active, which it is not during an I/O operation. | ||
On the 48K Spectrum and 128K Spectrum, two effects can occur here: | On the 48K Spectrum and 128K Spectrum, two effects can occur here: | ||