651
edits
(more control bus lines HALT, WAIT, INT, NMI) |
No edit summary |
||
Line 5: | Line 5: | ||
== Instruction Set == | == Instruction Set == | ||
{{Main|Z80 Programming#Instruction Set}} | {{Main|Z80 Programming#Instruction Set}} | ||
== OUT (C),0 / OUT (C),255 Instruction == | |||
In 1996, Simon Cooke noted in a [https://groups.google.com/d/msg/comp.os.cpm/HfSTFpaIkuU/KotvMWu3bZoJ Usenet posting] that the undocumented instruction usually referred to as 'OUT (C),0' behaves instead as 'OUT (C),255' on CMOS Z80s. | |||
Later, in 2004, Colin Piggot rediscovered this with his own SAM Coupé, when running a demo for SCPDU 6, coincidentally written by Simon Cooke. With the CMOS Z80, a white background colour was set over part of the screen in the demo. This was described in SAM Revival Issue 9 (March/April 2004). | |||
In 2008, this was once again [http://www.msx.org/forum/development/msx-development/bug-z80-emulation-or-tr-hw rediscovered by the MSX community]. | |||
== Bits 3 and 5 of the F Register == | |||
Woody confirmed that bits 3 and 5 of the flags are copied on all BIT instructions on both a Zilog Z80 and an NEC clone (stated on the link above as being "unverified"). | |||
Stuart Brady discovered that how bits 3 and 5 of the flags are set after the SCF and CCF instructions actually depends on the variant of Z80 in use. On a Zilog Z80, bits 3 and 5 of the flags were set by ORing their previous values with that of A. On an NEC clone, bit 3 was unaffected, while bit 5 appears to be set by ANDing the previous value with something unknown. Previously, Ian Greenway tested this and found that bits 3 and 5 seemed simply to be copied from A, although it is not known which CPU these tests were run on. For more details, see [http://sourceforge.net/mailarchive/forum.php?thread_name=20040217082529.GH17981%40philos.lan.philosys.de&forum_name=fuse-emulator-devel here], [http://sourceforge.net/mailarchive/forum.php?thread_name=20070522223156.GA12009%40miranda.arrow&forum_name=fuse-emulator-devel here] and a more recent investigation [http://groups.google.co.uk/group/comp.sys.sinclair/msg/56dd1fd4ccb5fb3b here]. | |||
Patrik Rak however later [http://www.worldofspectrum.org/forums/showthread.php?p=669314 discovered] that the way how the flags 5 and 3 are affected after SCF/CCF actually depends on the previous instruction completed. In case of genuine Zilog CPU, if an instruction modifies the flags, the immediately following SCF/CCF does move of bits 5 and 3 from A to F, whereas if an instruction doesn't modify the flags (and after interrupt), the SCF/CCF does OR of bits 5 and 3 from A to F. In case of NEC and other clones, it is similar, except that instead of OR it does AND with some unknown value, making the result unreliable. | |||
== Bus == | == Bus == | ||
Line 39: | Line 54: | ||
== Replacements == | == Replacements == | ||
Z80 chips are still available new, due largely to their continued popularity for embedded systems. Component suppliers such as Farnell and Rapid usually have them in stock. | Z80 chips are still available new, due largely to their continued popularity for embedded systems. Component suppliers such as Farnell and Rapid usually have them in stock. | ||
{{CC-BY-SA-techwiki|Z80|Z80}} |