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====CPU Clock==== | ====CPU Clock==== | ||
The CKEXT signal is available on Lower Pin 8. The CPU clock signal is generated by the [[The Amstrad gate array|gate array]] (IC1) and is interrupted during [[contended memory]] access | The CKEXT signal is available on Lower Pin 8. The CPU clock signal is generated by the [[The Amstrad gate array|gate array]] (IC1) and is interrupted during [[contended memory]] access. The CKEXT signal is inverted in relation to the CPU clock input. | ||
====Key Slot==== | ====Key Slot==== |