| cpu = [[Z80|Z80A]] @ 3.5MHz
| rom =
32kB ( 64kB installed)| ram = 280kB| rampage = [[#Memory| 64kB + 64kB + 144kB + 8kB]]
| manu = A. Owen and J. Adamski
| volume = Prototype only
* Codename: Chloe
* CPU: Z80A @ 3.5MHz
* RAM: 280K (
64kB EX, 64kB DOCK, 144kB HOME, 8kB PRAM)* ROM: 64kB ( 32kB active, 32kB passive)
* Sound: [[AY-3-8912]] (on Spectrum 128 and TS2068 port addresses)
* Joystick: [[Kempston Joystick Interface|Kempston]] (with +5v and 2nd button connection)
== Memory ==
The SE combines the RAM paging systems of the [[Timex 2000 series|Timex TS2068]] with the ZX Spectrum 128 and then adds another 16K to that. This means it uses two different systems to access its full
272kB of RAM. Jarek installed his 128 compatibility upgrade to take the RAM to 144kB and then installed a 128kB SRAM connected to the Timex memory management unit.
The Timex Horizontal MMU sees the RAM as three banks of memory; HOME, DOCK, and EX banks.
The HOME bank is the normal Spectrum memory area. The top
32kB is uncontended but the 16kB screen area below that is contended. DOCK and EX banks are overlaid on this bank, but paging over the screen area does not change the RAM used by the ULA. This does mean it is possible to set up a screen and page it out.
Memory is paged in
8kB banks from either the DOCK or the EX bank, but these banks are mutually exclusive - you cannot page in a bank from both simultaneously. Bit 7 of port 0xff determines which bank to use (0=DOCK, 1=EX-ROM). Port 0xf4 determines which banks are to be paged in with each bit referring to the relevant bank (0-7 or 0'-7'). When memory is being paged, interrupts should be disabled and the stack should be in an area which is not going to change.
On a [[Timex 2000 series|TC2048]], BASIC is contained in the 16K ROM area and banks 0-7 and 0'-7' are not normally available, while on a TS2068 part of the BASIC is stored in an
8kB ROM in bank 0' and cartridges plugged into the dock use banks 0-7. On the SE each of these banks is connected to 64kB of RAM, providing an additional 128kB in addition to the base RAM.
The contended memory timings for the SE are unknown but should be similar to that for the 48K machine, except that the pattern starts at a different number of T-states after the interrupt, than the usual 14335. Odd banks in the 128 scheme are contended.
Reading this port returns the last byte sent to it.
The TS2068 only has
48kB of base RAM, but the SE has also been expanded to use a variation of the ZX Spectrum 128 paging system to increase the base RAM to 144kB. This means that the HOME bank is paged like a normal Spectrum 128, except that there is an additional bank at 0x8000 where you would expect to find Bank 2. This does not appear to cause any problems with existing commercial software, although some demos (such as 'Real Action') are affected, but it provides some more memory.
The HOME bank is paged in the same way as the Spectrum 128, using port 0x7ffd.
The second side effect is that bits 2 and 3 of the MMU port 0xf4 also apply for those odd (slow) banks in section D. So when you select one of the odd banks (for section D, using port 0x7ffd), and then switch section B (0x4000..0x7fff) to DOCK/EX, you will have also the DOCK/EX in section D.
The whole memory map is described below. The DOCK/EX memory is marked as X0...X7, because you can only have DOCK or EX at a time (bit 7 of 0xfe port). The number means 1/8 part of
64kB, corresponding to bit in 0xf4 port.
The sections are marked as AL, AH, BL, BH, CL, CH, DL, DH. Every one means
In case of HOME selected
In case of DOCK/EXROM selected (except B section)
This means OUT 244, BIN 11110011 or its
8kB variants like mixed with HOME (other 8kB of each 16kB are HOME) OUT 244, BIN 10100010 or OUT 244, BIN 01010001; or mixed with DOCK OUT 244, BIN 11110111 or OUT 244, BIN 11111011, this applies respectively.
bank number outed to 0x7ffd
section 0 1 2 3 4 5 6 7
In case of DOCK/EXROM selected (except D section)
This means OUT 244, BIN 00111111 or its
8kB variants (BIN 0x1x1x1x or BIN x0x1x1x1).
bank number outed to 0x7ffd
section 0 1 2 3 4 5 6 7
== ROM ==
The standard ROM is replaced with a
64kB EPROM. Only two pages are visible to the hardware;
The first is a modified version of the ZX Spectrum 128 editor. A call to the TEST routine in ROM-1 is replaced with code to reset the Timex ULA.
== Sound chip ==
The [[AY-3-8912]] sound chip has an added
8kB serial EEPROM. Port 14 of the AY is used as an I²C driver (must work as output). Bit 0 is the SDA (data) line, bit 1 is SCL (clock) of the I²C. The chip mapped to four I/O ports:
OUT (0xfffd) - Select a register 0-14.
IN (0xfffd) - Read the value of the selected register.
With careful timing it is possible to mix screen modes so you could have a screen where the top half is hi-colour and the bottom half is hi-res - perfect for text adventures with graphics. Using a similar technique it is also possible to have more than two colours on a hi-res screen. No commercial software ever did this though.
In addition to these screen modes the ULA can access two separate video areas, just like a Spectrum 128. This is done by using bit 3 of port 0x7ffd. This gives the ULA a total of
27kB of RAM which can be used for up to four standard screen areas or two hi-res or hi-colour screens.
Port 0xfe deals with basic I/O. As mentioned before addresses are fully decoded, so whereas on a normal Spectrum every even I/O address will address the ULA, the SE will only respond to the correct port. The port is decoded as follows: