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ZX Spectrum +2A/2B, +3/3B edge connector

96 bytes removed, 11:16, 12 November 2017
Notes on Connections
====CPU Clock====
The CKEXT signal is available on Lower Pin 8. The CPU clock signal is generated by the [[The Amstrad gate array|gate array]] (IC1) and is interrupted during [[contended memory]] access. This clock signal is fed into the Z80 via a series resistor. The CKEXT signal is inverted in relation to the CPU clock as it has been passed through a NOT gateinput.
====Key Slot====
====ROM disable pins====
All the previous models of ZX Spectrum have a single ROM chip which could be disabled to facilitate paging in external memory by pulling the {{overline|ROMCS}} line high. The +2A/+3 and +3B however have two ROM chips and brings them out to independent pins on the expansion port. The old {{overline|ROMCS}} pin (Lower pin 25) is not used, and instead Upper pin 4 and Lower pin 15 are used. These pins were both unused on the [[ZX Spectrum + 128K edge connector|128k+128K]], however Lower pin 15 was used for composite video out on the [[ZX Spectrum 16k16K/48k 48K edge connector|16k16K/48k48K]].
====Disc Controller Signals====

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