NTSC Spectrum: Difference between revisions

Jump to navigation Jump to search
m
Use ÷ for division
m (UM1233 modulator)
m (Use ÷ for division)
Line 5: Line 5:
* The CPU is clocked at 3.5275 MHz.
* The CPU is clocked at 3.5275 MHz.
* The ULA is a model 6C011E-3 (dated 8501 in the example in question) which generates a NTSC frame size and rate.
* The ULA is a model 6C011E-3 (dated 8501 in the example in question) which generates a NTSC frame size and rate.
* One frame lasts 0xe700 (59136) T-states, giving a frame rate of 3.5275×10<sup>6</sup> / 59136 = 59.65 Hz.
* One frame lasts 0xe700 (59136) T-states, giving a frame rate of 3.5275×10<sup>6</sup> ÷ 59136 = 59.65 Hz.
* 224 T-states per line implies 264 lines per frame.
* 224 T-states per line implies 264 lines per frame.
* The first [[Contended memory|contended cycle]] is at 0x22ff (8959). This implies 40 lines of upper border, 192 lines of picture and 32 lines of lower border/retrace.
* The first [[Contended memory|contended cycle]] is at 0x22ff (8959). This implies 40 lines of upper border, 192 lines of picture and 32 lines of lower border/retrace.

Navigation menu