ZX Spectrum ULA: Difference between revisions

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→‎5C and 6C ULAs: Remove duplicated pin number
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The '''ULA''' (Uncommitted Logic Array) is a chip which controls most of the interfaces between the Z80 CPU and peripheral functions.
The '''ULA''' (Uncommitted Logic Array) is a chip which controls most of the interfaces between the Z80 CPU and peripheral functions.


The [[ZX Spectrum 16k/48k]] ULA went through [[#ULA versions|multiple revisions]] and is either a 5C or 6C series Ferranti ULA.
The [[ZX Spectrum 16K/48K]] ULA went through [[#ULA versions|multiple revisions]] and is either a 5C or 6C series Ferranti ULA.


On a [[ZX Spectrum+ 128K]], or [[ZX Spectrum +2]] the ULA is the Ferranti 7K010E (labelled Amstrad 40056 in +2)
On a [[ZX Spectrum 128]], or [[ZX Spectrum +2]] the ULA is the Ferranti 7K010E (later labelled Amstrad 40056)


The ZX Spectrum +2A/2B, +3/3B machines use an entirely different gate array. See [[The Amstrad ASIC]]
The [[ZX Spectrum +2A/2B, +3/3B|ZX Spectrum +2A, +3, +2B, and +3B]] use an entirely different gate array. See [[The Amstrad gate array]]


Sinclair also experimented with an alternative [[#AMI SAGA|AMI SAGA]] chip in a special batch.
Sinclair also experimented with an alternative [[#AMI SAGA|AMI SAGA]] chip in a special batch.
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{{Main|Contended memory}}
{{Main|Contended memory}}
The ULA has priority for reading from RAM, since it needs to be able to generate the display promptly.  Thus if the Z80 attempts to read/write memory from the range 0x4000 to 0x7FFF (ie. A15 =0, A14 =1) while the display is being generated, the ULA will stop the Z80 (by disabling the CPU clock) until it has finished reading VRAM.  This is known as "RAM contention" and the range 0x4000 to 0x7FFF is the "contended RAM".  While the TV scan is within the display area, contention is applied for 6 T-states out of every 8.
The ULA has priority for reading from RAM, since it needs to be able to generate the display promptly.  Thus if the Z80 attempts to read/write memory from the range 0x4000 to 0x7FFF (ie. A15 =0, A14 =1) while the display is being generated, the ULA will stop the Z80 (by disabling the CPU clock) until it has finished reading VRAM.  This is known as "RAM contention" and the range 0x4000 to 0x7FFF is the "contended RAM".  While the TV scan is within the display area, contention is applied for 6 T-states out of every 8.
=== IO Contention ===
 
{{Main|Contended IO}}
=== I/O Contention ===
Weirdly, the ULA also applies contention to IO port reads/writes if A15 =0 and A14 =1.  ''(details should go here; IO contention is more complicated somehow)''
{{Main|Contended I/O}}
Weirdly, the ULA also applies contention to I/O port reads/writes if A15 =0 and A14 =1.  ''(details should go here; I/O contention is more complicated somehow)''
 
=== The Snow Effect ===
=== The Snow Effect ===
{{Copyedit}}
{{Copyedit}}
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== Flash attribute timing bug ==
== Flash attribute timing bug ==
The flash attribute suffers from a timing bug, in that the flash signal is not in sync with the pixel with which it is XORed.  On frames where the flash signal is inactive, this bug is not apparent, but where the flash signal is active, and used within an attribute block, flash will also affect the very right-hand edge of the preceding block, and in attribute blocks where flash is not set, flash will fail to affect the very right-hand edge of the preceding block.  This bug only affects instances where there is a transition in pixel value between one character block and the next, but the flash attribute reverses that transition.  As such, this does not affect the Spectrum's flashing cursor, as its graphic has edges matching the surrounding "paper" and not the ink.  No existing emulator known to implement this display artifact.
The flash attribute suffers from a timing bug, in that the flash signal is not in sync with the pixel with which it is XORed.  On frames where the flash signal is inactive, this bug is not apparent, but where the flash signal is active, and used within an attribute block, flash will also affect the very right-hand edge of the preceding block, and in attribute blocks where flash is not set, flash will fail to affect the very right-hand edge of the preceding block.  This bug only affects instances where there is a transition in pixel value between one character block and the next, but the flash attribute reverses that transition.  As such, this does not affect the Spectrum's flashing cursor, as its graphic has edges matching the surrounding "paper" and not the ink.  No existing emulator known to implement this display artifact.
== Pinouts ==
=== 5C and 6C ULAs ===
<div style="font-family:'Lucida Console', monospace">
{|
| style="text-align:right;" |
{{overline|CAS}}<br>
{{overline|WR}}<br>
{{overline|RD}}<br>
{{overline|WE}}<br>
A<sub>0</sub><br>
A<sub>1</sub><br>
A<sub>2</sub><br>
A<sub>3</sub><br>
A<sub>4</sub><br>
A<sub>5</sub><br>
A<sub>6</sub><br>
{{overline|INT}}<br>
(+5V) V<sub>CC-Logic</sub><br>
(+5V) V<sub>CC-IO</sub><br>
U<br>
V<br>
{{overline|Y}}<br>
D<sub>0</sub><br>
KB<sub>0</sub><br>
KB<sub>1</sub>
| style="border: 1px solid black" |
1&nbsp;°&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;40<br>
2&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;39<br>
3&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;38<br>
4&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;37<br>
5&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;36<br>
6&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;35<br>
7&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;34<br>
8&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;33<br>
9&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;32<br>
10&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;31<br>
11&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;30<br>
12&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;29<br>
13&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;28<br>
14&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;27<br>
15&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;26<br>
16&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;25<br>
17&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;24<br>
18&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;23<br>
19&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;22<br>
20&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;21
||
GND (0V)<br>
OSC<br>
{{overline|MREQ}}<br>
A<sub>15</sub><br>
A<sub>14</sub><br>
{{overline|RAS}}<br>
{{overline|ROMCS}}<br>
{{overline|IOREQ}}<br>
CLOCK<br>
D<sub>7</sub><br>
D<sub>6</sub><br>
D<sub>5</sub><br>
SOUND<br>
D<sub>4</sub><br>
KB<sub>4</sub><br>
D<sub>3</sub><br>
KB<sub>3</sub><br>
KB<sub>2</sub><br>
D<sub>2</sub><br>
D<sub>1</sub>
|}
</div>
=== 7C ULA ===
<div style="font-family:'Lucida Console', monospace">
{|
| style="text-align:right;" |
17M<br>
{{overline|CAS}}<br>
C<br>
DMA<sub>0</sub><br>
DMA<sub>1</sub><br>
DMA<sub>2</sub><br>
DMA<sub>3</sub><br>
DMA<sub>4</sub><br>
DMA<sub>5</sub><br>
DMA<sub>6</sub><br>
DMA<sub>7</sub><br>
VB<br>
(+5V) V<sub>CC-Logic</sub><br>
(+5V) V<sub>CC-IO</sub><br>
{{overline|RD}}<br>
{{overline|WR}}<br>
{{overline|INT}}<br>
{{overline|DRAMWE}}<br>
B<br>
G<br>
R<br>
BRIGHT<br>
SYNC<br>
D<sub>0</sub>
| style="border: 1px solid black" |
1&nbsp;°&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;48<br>
2&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;47<br>
3&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;46<br>
4&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;45<br>
5&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;44<br>
6&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;43<br>
7&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;42<br>
8&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;41<br>
9&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;40<br>
10&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;39<br>
11&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;38<br>
12&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;37<br>
13&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;36<br>
14&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;35<br>
15&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;34<br>
16&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;33<br>
17&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;32<br>
18&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;31<br>
19&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;30<br>
20&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;29<br>
21&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;28<br>
22&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;27<br>
23&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;26<br>
24&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;25
||
GND (0V)<br>
8.8M<br>
{{overline|8.8M}}<br>
{{overline|MREQ}}<br>
A<sub>15</sub><br>
A<sub>14</sub><br>
{{overline|RAS}}<br>
ROMS<br>
{{overline|IORQ}}<br>
PHICPU<br>
D<sub>7</sub><br>
D<sub>6</sub><br>
D<sub>5</sub><br>
MIC<br>
EAR<br>
D<sub>4</sub><br>
KB<sub>0</sub><br>
D<sub>3</sub><br>
KB<sub>1</sub><br>
KB<sub>2</sub><br>
D<sub>2</sub><br>
D<sub>1</sub><br>
KB<sub>3</sub><br>
KB<sub>4</sub>
|}
</div>

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