ZX Spectrum SE

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Infobox: ZX Spectrum SE
Manufacturer A. Owen and J. Adamski
Mfg. volume Prototype only
CPU Z80A @ 3.5MHz
ROM 32kB (64kB installed)
RAM 280kB
as pages 64kB + 64kB + 144kB + 8kB
Gfx Res 256×192 or 512×192 (hi-res)
Gfx Colours 15 (2 per 8×8 or 8×1 cell), or 2 (hi-res)

The ZX Spectrum SE is a Spectrum clone created by Andrew Owen and Jarek Adamski. Although only a single prototype was created, it is supported by a number of emulators on various platforms. It should not be confused with the SE Basic ROM. The Chloe 280SE specification is based on this machine.

Technical specification

  • Codename: Chloe
  • CPU: Z80A @ 3.5MHz
  • RAM: 280K (64kB EX, 64kB DOCK, 144kB HOME, 8kB PRAM)
  • ROM: 64kB (32kB active, 32kB passive)
  • Sound: AY-3-8912 (on Spectrum 128 and TS2068 port addresses)
  • Joystick: Kempston (with +5v and 2nd button connection)


The SE combines the RAM paging systems of the Timex TS2068 with the ZX Spectrum 128 and then adds another 16K to that. This means it uses two different systems to access its full 272kB of RAM. Jarek installed his 128 compatibility upgrade to take the RAM to 144kB and then installed a 128kB SRAM connected to the Timex memory management unit.

The Timex Horizontal MMU sees the RAM as three banks of memory; HOME, DOCK, and EX banks.

The HOME bank is the normal Spectrum memory area. The top 32kB is uncontended but the 16kB screen area below that is contended. DOCK and EX banks are overlaid on this bank, but paging over the screen area does not change the RAM used by the ULA. This does mean it is possible to set up a screen and page it out.

Memory is paged in 8kB banks from either the DOCK or the EX bank, but these banks are mutually exclusive - you cannot page in a bank from both simultaneously. Bit 7 of port 0xff determines which bank to use (0=DOCK, 1=EX-ROM). Port 0xf4 determines which banks are to be paged in with each bit referring to the relevant bank (0-7 or 0'-7'). When memory is being paged, interrupts should be disabled and the stack should be in an area which is not going to change.

On a TC2048, BASIC is contained in the 16K ROM area and banks 0-7 and 0'-7' are not normally available, while on a TS2068 part of the BASIC is stored in an 8kB ROM in bank 0' and cartridges plugged into the dock use banks 0-7. On the SE each of these banks is connected to 64kB of RAM, providing an additional 128kB in addition to the base RAM.

The contended memory timings for the SE are unknown but should be similar to that for the 48K machine, except that the pattern starts at a different number of T-states after the interrupt, than the usual 14335. Odd banks in the 128 scheme are contended.

Reading this port returns the last byte sent to it.

The TS2068 only has 48kB of base RAM, but the SE has also been expanded to use a variation of the ZX Spectrum 128 paging system to increase the base RAM to 144kB. This means that the HOME bank is paged like a normal Spectrum 128, except that there is an additional bank at 0x8000 where you would expect to find Bank 2. This does not appear to cause any problems with existing commercial software, although some demos (such as 'Real Action') are affected, but it provides some more memory.

The HOME bank is paged in the same way as the Spectrum 128, using port 0x7ffd.

D0-2: RAM bank (0-7) to map into memory at 0xc000. 
D3:   Select video area to be used by ULA; Bank 5 or Bank 7.
D4:   Select ROM; 0 - Editor or 1 - Basic.
D5-7: Not used.

HOME RAM banks 1,3,4,6 and most of 7 are used for the RAM disk in 128 Basic; the rest of 7 contains editor scratchpads.

The EX and DOCK banks are paged by the horizontal MMU.

Screen 0'
Screen 1'
EX 6 DOCK 6 Screen 0 Screen 1
Screen 0
EX 2 DOCK 2 Screen 0

The EX and DOCK banks are mutually exclusive. Pages from these banks may be switched in over the HOME bank.

Owing to the use of two completely different paging systems there are certain hardware limitations on which banks can be paged in. The first side effect is that the odd (slow) banks of the 128 paging system have higher priority than the DOCK and EX banks.

The memory map looks like this:

bank number outed to 0x7ffd
        0     1     2     3     4     5     6     7
'---selected in section D

So, to use the DOCK or EX memory in 0xc000...0xffff, one of the even banks (0,2,4,6) from the 128 paging system must be selected. If the selected bank is 1,3,5, or 7 this bank will appear instead of DOCK or EX memory. This concerns bits 6 and 7 of the MMU port 0xf4.

The second side effect is that bits 2 and 3 of the MMU port 0xf4 also apply for those odd (slow) banks in section D. So when you select one of the odd banks (for section D, using port 0x7ffd), and then switch section B (0x4000..0x7fff) to DOCK/EX, you will have also the DOCK/EX in section D.

The whole memory map is described below. The DOCK/EX memory is marked as X0...X7, because you can only have DOCK or EX at a time (bit 7 of 0xfe port). The number means 1/8 part of 64kB, corresponding to bit in 0xf4 port.

The sections are marked as AL, AH, BL, BH, CL, CH, DL, DH. Every one means 8kB.

In case of HOME selected

OUT 244,BIN 00000000

bank number outed to 0x7ffd
section   0     1     2     3     4     5     6     7
CH  5     ----------------- RAM8H only ------------------
CL  4     ----------------- RAM8L only ------------------
BH  3     ----------------- RAM5H only ------------------
BL  2     ----------------- RAM5L only ------------------
AH  1     --------------- ROM0H or ROM1H ----------------
AL  0     --------------- ROM0L or ROM1H ----------------

In case of DOCK/EXROM selected (except B section)

This means OUT 244, BIN 11110011 or its 8kB variants like mixed with HOME (other 8kB of each 16kB are HOME) OUT 244, BIN 10100010 or OUT 244, BIN 01010001; or mixed with DOCK OUT 244, BIN 11110111 or OUT 244, BIN 11111011, this applies respectively.

bank number outed to 0x7ffd
section   0     1     2     3     4     5     6     7
DH  7     X7    RAM1H X7    RAM3H X7    RAM5H X7    RAM7H
DL  6     X6    RAM1L X6    RAM3L X6    RAM5L X6    RAM7L
CH  5     ------------------- X5 only -------------------
CL  4     ------------------- X4 only -------------------
BH  3     ----------------- RAM5L only ------------------
BL  2     ----------------- RAM5L only ------------------
AH  1     ------------------- X1 only -------------------
AL  0     ------------------- X0 only -------------------

In case of DOCK/EXROM selected (in every section) (independency from 7FFD port)

OUT 244, BIN 1111111

DH  7     X7
DL  6     X6
CH  5     X5
CL  4     X4
BH  3     X3
BL  2     X2
AH  1     X1
AL  0     X0

In case of DOCK/EXROM selected (except D section)

This means OUT 244, BIN 00111111 or its 8kB variants (BIN 0x1x1x1x or BIN x0x1x1x1).

bank number outed to 0x7ffd
section   0     1     2     3     4     5     6     7
DH  7     RAM0H X7    RAM2H X7    RAM4H X7    RAM6H X7
DL  6     RAM0L X6    RAM2L X6    RAM4L X6    RAM6L X6
CH  5     ------------------- X5 only -------------------
CL  4     ------------------- X4 only -------------------
BH  3     ------------------- X3 only -------------------
BL  2     ------------------- X2 only -------------------
AH  1     ------------------- X1 only -------------------
AL  0     ------------------- X0 only -------------------

Kempston joystick port

The port is read via 0x1f (active high):

D7 - Mouse Button 
D6 - 
D5 - Mouse Button
D4 - Fire
D3 - Up
D2 - Down
D1 - Left
D0 - Right


The standard ROM is replaced with a 64kB EPROM. Only two pages are visible to the hardware;

The first is a modified version of the ZX Spectrum 128 editor. A call to the TEST routine in ROM-1 is replaced with code to reset the Timex ULA.

The second is an exact copy of the original ZX Spectrum BASIC but has TR-DOS traps in place of the character set (0x3c00 to 0x3fff is filled with PUSH AF: RST 8: NOP: NOP).

This makes the machine more compatible with existing software titles than the original ZX Spectrum 128. A third page is exactly as the same as the first and a fourth page is exactly the same as second, but without TR-DOS traps (it has the character set). The A15 line of EPROM is connected to /M1 of Z80, while the A14 is connected to bit 3 of the 0x7ffd port latch. The TR-DOS traps allow emulation of TR-DOS by the ZXVGS operating system. Custom ROMs can be loaded into memory and paged into place using the DOCK or EX banks. Jarek has fitted an external NMI button for ROMs with a working NMI routine.

Sound chip

The AY-3-8912 sound chip has an added 8kB serial EEPROM. Port 14 of the AY is used as an I²C driver (must work as output). Bit 0 is the SDA (data) line, bit 1 is SCL (clock) of the I²C. The chip mapped to four I/O ports:

OUT (0xfffd) - Select a register 0-14.
IN  (0xfffd) - Read the value of the selected register.
OUT (0xbffd) - Write to the selected register.

These ports match the AY chip used in the ZX Spectrum 128.

OUT (0xf5)   - Select a register 0-14
IN  (0xf5)   - Read the value of the selected register 
OUT (0xf6)   - Write to the selected register

These ports match the AY chip used in the Timex TS2068.

The output is ABC/ACB stereo switchable.

The sound produced by the beeper plays through an internal speaker but is muted when loading or saving to tape.


The SE has a modified version of the TC2048 SCLD in place of the normal ULA. As a result the T-state timings are close to, but subtly different from, the 48.

The Spectrum's ULA bug which causes snow when I is set to point to contended memory is also present in the TC2048 SCLD (ULA) but has been fixed by Jarek by adding an AND gate. He has also fixed a problem with the SCLD which would produce snow if IM2 was selected. The TS2068 SCLD provides a number of additional screen modes controlled using port 0xff. An unfortunate side effect of this is that a few games, like Arkanoid, which expect reading 0xff to produce screen and ATTR data bytes when the ULA is reading screen memory, will not work because the value returned will be the last byte sent to the port. The SCLD is also responsible for I/O and unlike a normal Spectrum, port addresses are fully decoded. This means it is not possible to read the keyboard from alternate addresses which also causes problems with some games. Port 0xff is also used to enable/disable the timer interrupt and select which bank of memory should be used by the horizontal MMU. The byte to output will be interpreted thus:

D0-2: Screen mode. 000=screen 0, 001=screen 1, 010= hi-colour, 110=hi-res
D3-5: Sets the screen colour in hi-res mode.
        000 - Black on white.     100 - Green on magenta.
        001 - Blue on yellow.     101 - Cyan on red.
        010 - Red on cyan.        110 - Yellow on blue.
        011 - Magenta on green.   111 - White on black.
D6:   If set disables the generation of the timer interrupt.
D7:   Selects which bank the horizontal MMU should use. 0=DOCK, 1=EX.

Screen 0 is the normal screen at the start of video memory. Screen 1 uses the same format but is offset by 8K.

The hi-res screen uses the data area of screen 0 and screen 1 to create a 512×192 pixel screen. Columns are taken alternately from screen 0 and screen 1. The attribute area is not used. In this mode all colours, including the BORDER, are BRIGHT, and the BORDER colour is the same as the PAPER colour.

The hi-colour screen uses the data area of screen 0 for its data and the data area of screen 1 for its attributes, giving 2 colours per 8x1 pixel block. The attribute area is in the same byte order as the data area, which means MLT files, which have the attribute area in series, must be converted to be displayed.

Bit 6 has the equivalent function of a DI machine code instruction when set or an EI instruction otherwise.

With careful timing it is possible to mix screen modes so you could have a screen where the top half is hi-colour and the bottom half is hi-res - perfect for text adventures with graphics. Using a similar technique it is also possible to have more than two colours on a hi-res screen. No commercial software ever did this though.

In addition to these screen modes the ULA can access two separate video areas, just like a Spectrum 128. This is done by using bit 3 of port 0x7ffd. This gives the ULA a total of 27kB of RAM which can be used for up to four standard screen areas or two hi-res or hi-colour screens.

Port 0xfe deals with basic I/O. As mentioned before addresses are fully decoded, so whereas on a normal Spectrum every even I/O address will address the ULA, the SE will only respond to the correct port. The port is decoded as follows:

D0-2: Border
D3:   MIC
D4:   EAR/beeper

IN: Reads keys (bit 0 to bit 4 inclusive)

0xfefe  SHIFT, Z, X, C, V            0xeffe  0, 9, 8, 7, 6
0xfdfe  A, S, D, F, G                0xdffe  P, O, I, U, Y
0xfbfe  Q, W, E, R, T                0xbffe  ENTER, L, K, J, H
0xf7fe  1, 2, 3, 4, 5                0x7ffe  SPACE, SYM SHFT, M, N, B


Software consists primarily of emulators. The following machines can be emulated on the SE:

  • Acorn BBC B (unfinished)
  • Apple I
  • Commodore VIC-20
  • Compukit UK101
  • Galaksija
  • Jupiter Ace
  • Phillips Videopac G7000
  • Sinclair ZX80
  • Sinclair ZX81
  • Sinclair ZX Spectrum
  • Sinclair ZX Spectrum 128
  • Timex Computer TC2068

It can also emulate IF2 ROM cartridges and the Mikro-Plus cartridge. There is also a version of BBC Basic (Z80) available.

Article license information

This article uses material from the "ZX Spectrum SE" article on the ZX Spectrum technical information wiki at Fandom (formerly Wikia) and is released under the Creative Commons Attribution-Share Alike License.