ZX Spectrum 16K/48K edge connector

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Upper   Lower
A15 1 A14
A13 2 A12
D7 3 +5v
NC 4 +9v
SLOT 5 SLOT
D0 6 0v
D1 7 0v
D2 8 CK
D6 9 A0
D5 10 A1
D3 11 A2
D4 12 A3
INT 13 IORQULA
NMI 14 0v
HALT 15 VIDEO
MREQ 16 Y
IORQ 17 V
RD 18 U
WR 19 BUSRQ
-5v 20 RESET
WAIT 21 A7
+12v 22 A6
12v AC 23 A5
M1 24 A4
RFSH 25 ROMCS
A8 26 BUSACK
A10 27 A9
NC 28 A11

The ZX Spectrum 16k/48k expansion connector is a double sided card edge connector with a 0.1 inch spacing. The two rows of conductors are numbered from right to left looking into the rear of the computer. One pair of conductors are missing as there is an indexing slot cut out of the circuit board.

The pinout is related to that used for the ZX80 and ZX81, although extended and several signals relocated. The ZX Printer is an example of an interface capable of attaching to both the ZX81 and ZX Spectrum.

Notes on Connections

CPU Clock

The CK signal, sometimes referred to as PHICPU or ΦCPU is available on Lower Pin 8. This clock signal is generated by the ULA and is interrupted during contended memory access. This clock signal is inverted by a transistor switch to provide a clean clock edge for the Z80.

IO Request Signals

The !IORQ signal generated by the Z80 is connected to the IOREQ input of the ULA via a series resistor allowing the IOREQ pin to be pulled high by TR6 when the A0 address line is high. This has the effect of allowing the ULA to respond to an IO request only when A0 is low.

This combined IORQ+A0 signal is connected to Lower Pin 13 and is referred to as IORQULA or sometimes IORQGE.

Some peripherals[Which?] use this as an input to inhibit the ULA {{overline|IOREQ]] even when A0 is low thereby allowing the use of even numbered ports.

Key Slot

The key slot ensures correct alignment of a peripheral with the edge connector. This slot is the width of one conductor and lies between Pin 4 and Pin 6, i.e. Pin 5 does not exist.

Power

  • Lower Pin 4 is connected to the +9 volt (nominal) DC supply from the ZX Spectrum PSU.
  • Lower Pin 3 is connected to the smoothed +5 volt DC output of the internal 7805 regulator.
  • Upper Pin 20 is connected to the -5 volt DC output of the internal power supply circuitry.
  • Upper Pin 22 is connected to the +12 volt DC output of the internal power supply circuitry.
  • Upper Pin 23 is connected to the oscillating voltage within the internal power supply circuitry. This is nominally 12 volts AC.
  • Lower Pins 6, 7, and 14 are connected to the 0 volt rail.

Video Outputs

  • Lower Pin 15 provides the same composite video signal that is fed into the UHF modulator.
  • Lower pin 16 carries an inverted luminosity signal to use with the 'U' and 'V' colour difference signals provided on lower pins 18 and 17 respectively. All three signals are generated by the ULA.