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ZX Spectrum 16K/48K edge connector: Difference between revisions

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[[Category:Spectrum]]
[[Category:Spectrum]]
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{{Template:Spectrum edge connector|A15|A13|D7|NC|[[#Key_Slot|SLOT]]|D0|D1|D2|D6|D5|D3|D4|!INT|!NMI|!HALT|!MREQ|!IORQ|!RD|!WR|[[#Power|-5v]]|!WAIT|[[#Power|+12v]]|[[#Power|12v AC]]|!M1|!RFSH|A8|A10|NC|A14|A12|[[#Power|+5v]]|[[#Power|+9v]]|[[#Key_Slot|SLOT]]|0v|0v|[[#CPU_Clock|!CK]]|A0|A1|A2|A3|[[#IO Request Signals|!IORQULA]]|0v|[[#Video_Outputs|VIDEO]]|[[#Video_Outputs|!Y]]|[[#Video_Outputs|V]]|[[#Video_Outputs|U]]|!BUSRQ|!RESET|A7|A6|A5|A4|!ROMCS|!BUSACK|A9|A11}}
{{Template:Spectrum edge connector|A15|A13|D7|NC|[[#Key_Slot|SLOT]]|D0|D1|D2|D6|D5|D3|D4|{{overline|INT}}|{{overline|NMI}}|{{overline|HALT}}|{{overline|MREQ}}|{{overline|IORQ}}|{{overline|RD}}|{{overline|WR}}|[[#Power|-5v]]|{{overline|WAIT}}|[[#Power|+12v]]|[[#Power|12v AC]]|{{overline|M1}}|{{overline|RFSH}}|A8|A10|NC|A14|A12|[[#Power|+5v]]|[[#Power|+9v]]|[[#Key_Slot|SLOT]]|0v|0v|[[#CPU_Clock|{{overline|CK}}]]|A0|A1|A2|A3|[[#IO Request Signals|{{overline|IORQULA}}]]|0v|[[#Video_Outputs|VIDEO]]|[[#Video_Outputs|{{overline|Y}}]]|[[#Video_Outputs|V]]|[[#Video_Outputs|U]]|{{overline|BUSRQ}}|{{overline|RESET}}|A7|A6|A5|A4|{{overline|ROMCS}}|{{overline|BUSACK}}|A9|A11}}
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One pair of conductors are missing as there is an [[#Key Slot|indexing slot]] cut out of the circuit board.
One pair of conductors are missing as there is an [[#Key Slot|indexing slot]] cut out of the circuit board.


The pinout is related to that used for the [[ZX80/81_Edge_Connector|ZX80 and ZX81]], although extended.  The [[ZX Printer]] is one such interface capable of attaching to both the ZX81 and ZX Spectrum.
The pinout is related to that used for the [[ZX80/81_Edge_Connector|ZX80 and ZX81]], although extended and several signals relocated.  The [[ZX Printer]] is an example of an interface capable of attaching to both the ZX81 and ZX Spectrum.


==Notes on Connections==
==Notes on Connections==


====CPU Clock====
====CPU Clock====
The !CK signal, sometimes referred to as PHICPU is available on Lower Pin 8. This clock signal is generated by the [[The Spectrum ULA|ULA]] and is interrupted during [[contended memory]] access. This clock signal is inverted by a transistor switch to provide a clean clock edge for the Z80.
The {{overline|CK signal}}, sometimes referred to as PHICPU or &Phi;CPU is available on Lower Pin 8. This clock signal is generated by the [[The Spectrum ULA|ULA]] and is interrupted during [[contended memory]] access. This clock signal is inverted by a transistor switch to provide a clean clock edge for the Z80.


====IO Request Signals====
====IO Request Signals====
The !IORQ signal generated by the Z80 is connected to the !IOREQ input of the [[The Spectrum ULA|ULA]] via a series resistor allowing the !IOREQ pin to be pulled high by TR6 when the A0 address line is high. This has the effect of allowing the ULA to respond to an IO request only when A0 is low.
The !IORQ signal generated by the Z80 is connected to the {{overline|IOREQ}} input of the [[The Spectrum ULA|ULA]] via a series resistor allowing the {{overline|IOREQ}} pin to be pulled high by TR6 when the A0 address line is high. This has the effect of allowing the ULA to respond to an IO request only when A0 is low.


This combined !IORQ+A0 signal is connected to Lower Pin 13 and is referred to as !IORQULA or sometimes !IORQGE.
This combined {{overline|IORQ}}+A0 signal is connected to Lower Pin 13 and is referred to as {{overline|IORQULA}} or sometimes {{overline|IORQGE}}.


Some peripherals<sup>[Which?]</sup> use this as an input to inhibit the ULA !IOREQ even when A0 is low thereby allowing the use of even numbered ports.
Some peripherals<sup>[Which?]</sup> use this as an input to inhibit the ULA {{overline|IOREQ]] even when A0 is low thereby allowing the use of even numbered ports.


====Key Slot====
====Key Slot====