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ZX Spectrum 16K/48K: Difference between revisions

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== ULA ==
== ULA ==


Much of the ZX Spectrum's custom logic is contained within an Uncommitted Logic Array and was designed by [[Richard Altwasser]]. The ULA was manufactured by [[Ferranti]]. ''The ZX Spectrum ULA'' by [[Chris Smith]] describes this device in detail.
Much of the ZX Spectrum's custom logic is contained within an Uncommitted Logic Array and was designed by [[Richard Altwasser]]. The ULA was manufactured by [[Ferranti]]. ''The ZX Spectrum ULA'' by [[Chris Smith]] describes this device in detail.


The ULA suffers from a few oversights in its design and implementation. An error in the timings applied by the ULA's [[Contended I/O|I/O contention]] circuit required a modification, the "dead cockroach", such that all I/O access to the I/O port that the ULA provides is contended as though the access is to the lower 16K of RAM, for which access is shared with the ULA.
The ULA suffers from a few oversights in its design and implementation. An error in the timings applied by the ULA's [[Contended I/O|I/O contention]] circuit required a modification, the "dead cockroach", such that all I/O access to the I/O port that the ULA provides is contended as though the access is to the lower 16K of RAM, for which access is shared with the ULA.


The "dead cockroach" was incorporated into later revisions of the ULA, rather than fixing the timing issue. The reason for this is not clear.
The "dead cockroach" was incorporated into later revisions of the ULA, rather than fixing the timing issue. The reason for this is not clear.


It was later noticed that the ULA contended all I/O access, not just that to its own I/O port. This was presumably avoidable, as the ULA uses the Z80's A0 line to determine whether to respond to I/O port requests. This issue was partially resolved by means of the "spider" modification, which gates the ULA's {{overline|IORQ}} input with A0.
It was later noticed that the ULA contended all I/O access, not just that to its own I/O port. This was presumably avoidable, as the ULA uses the Z80's A0 line to determine whether to respond to I/O port requests. This issue was partially resolved by means of the "spider" modification, which gates the ULA's {{overline|IORQ}} input with A0.


The 48K Spectrum suffers from severe dot crawl, as it was not realised that synchronising the pixel clock with the PAL colour subcarrier would help to minimise this.  The ULA outputs {{overline|Y}}, U and V signals without modulation with a carrier, so this can be avoided entirely, but the pixel clock cannot be adjusted without adversely affecting video timings. This issue was fixed in later models of the Spectrum.
The 48K Spectrum suffers from severe dot crawl, as it was not realised that synchronising the pixel clock with the PAL colour subcarrier would help to minimise this.  The ULA outputs {{overline|Y}}, U and V signals without modulation with a carrier, so this can be avoided entirely, but the pixel clock cannot be adjusted without adversely affecting video timings. This issue was fixed in later models of the Spectrum.


The "flash" attribute of the ZX Spectrum's display, designed to swap ink ("foreground)" and paper ("background") colours in any 8×8 attribute block that enable it, suffers from a timing issue, in that the inversion of the display's bitmap data is not properly synchronised with pixel boundaries. This results in a thin edge in cases where the combination of the flash effect together with swapping of ink and paper in successive attribute bytes (or, alternatively, inversion of the bitmap) ought to cancel out, leaving no visible change between the right of one attribute block and the left of the next.
The "flash" attribute of the ZX Spectrum's display, designed to swap ink (foreground) and paper (background) colours in any 8×8 attribute block that enable it, suffers from a timing issue, in that the inversion of the display's bitmap data is not properly synchronised with pixel boundaries. This results in a thin edge in cases where the combination of the flash effect together with swapping of ink and paper in successive attribute bytes (or, alternatively, inversion of the bitmap) ought to cancel out, leaving no visible change between the right of one attribute block and the left of the next.


Setting the Z80's I register to point within the range 0x4000–0x7fff causes the appearance of "snow" on the screen, as the ULA fails to correctly manage the Z80's DRAM refresh accesses.
Setting the Z80's I register to point within the range 0x4000–0x7fff causes the appearance of "snow" on the screen, as the ULA fails to correctly manage the Z80's DRAM refresh accesses.


Unlike many other Z80-based machines, the ZX Spectrum uses a memory contention scheme based on stopping the Z80's clock, rather than using the Z80's {{overline|WAIT}} signal. It is the ULA that implements this contention scheme, allowing code running in ROM or in the upper 32K of RAM and only accessing data in these areas to run at full Spectrum clock speed of 3.5 MHz. The approach taken by other Z80-based machines such as the Amstrad CPC requires that all Z80 M-cycles that access memory are slowed down regardless of the address that is accessed. Others, such as the MSX, use separate video RAM, accessed either using port I/O as in the case of the MSX, or otherwise requiring dual-ported VRAM.
Unlike many other Z80-based machines, the ZX Spectrum uses a memory contention scheme based on stopping the Z80's clock, rather than using the Z80's {{overline|WAIT}} signal. It is the ULA that implements this contention scheme, allowing code running in ROM or in the upper 32K of RAM and only accessing data in these areas to run at full Spectrum clock speed of 3.5 MHz. The approach taken by other Z80-based machines such as the Amstrad CPC requires that all Z80 M-cycles that access memory are slowed down regardless of the address that is accessed. Others, such as the MSX, use separate video RAM, accessed either using port I/O as in the case of the MSX, or otherwise requiring dual-ported VRAM.


The vast majority of the first batch of ULAs made failed to operate correctly, save for one, in which it was noticed that a speck of dust had happened to land in the necessary position on the die to connect two halves of the ULA's clock circuit, one of which had accidentally been left unconnected.
The vast majority of the first batch of ULAs made failed to operate correctly, save for one, in which it was noticed that a speck of dust had happened to land in the necessary position on the die to connect two halves of the ULA's clock circuit, one of which had accidentally been left unconnected.


The initial series of ZX Spectrum ULAs is the "5C". Ferranti later switched to their "6C" series ULAs, resulting in a decrease in power consumption (and therefore also temperature) of the ULA.
The initial series of ZX Spectrum ULAs is the 5C. Ferranti later switched to their 6C series ULAs, resulting in a decrease in power consumption (and therefore also temperature) of the ULA.


== [[NTSC Spectrum]] ==
== [[NTSC Spectrum]] ==