651
edits
mNo edit summary |
|||
Line 15: | Line 15: | ||
====CPU Clock==== | ====CPU Clock==== | ||
The !CK signal, sometimes referred to as PHICPU is available on Lower Pin 8. This clock signal is generated by the [[The Spectrum ULA|ULA]] and is interrupted during [[contended memory]] access | The !CK signal, sometimes referred to as PHICPU is available on Lower Pin 8. This clock signal is generated by the [[The Spectrum ULA|ULA]] and is interrupted during [[contended memory]] access. | ||
On the [[ZX Spectrum+ 128K|UK 128K]] the ULA clock pin is connected directly to the edge connector and is inverted by TR3 to drive the Z80. | |||
On the [[ZX Spectrum +2|+2]] the ULA clock pin is inverted by a NOT gate to generate the clock for the Z80. It is then inverted again by a second NOT gate to generate the edge connector !CK. | |||
The !CK signal is '''NOT''' connected on the [[Investronica]] [[ZX Spectrum+ 128K]]. | |||
====!IORQULA==== | ====!IORQULA==== |