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edits
m (Guesser moved page ZX Spectrum+ 128K edge connector to ZX Spectrum 128 edge connector: Proper name of Spectrum 128) |
m (Proper name of Spectrum 128) |
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<!-- edge connector table ends --> | <!-- edge connector table ends --> | ||
The [[ZX Spectrum | The [[ZX Spectrum 128]] [[:category:Edge Connectors|expansion connector]] is a double sided card edge connector with a 0.1 inch spacing. The two rows of conductors are numbered from right to left looking into the rear of the computer. | ||
One pair of conductors are missing as there is an [[#Key Slot|indexing slot]] cut out of the circuit board. | One pair of conductors are missing as there is an [[#Key Slot|indexing slot]] cut out of the circuit board. | ||
==The ZX Spectrum +2== | ==The ZX Spectrum +2== | ||
The [[ZX Spectrum +2]] uses the same pinout as the UK [[ZX Spectrum | The [[ZX Spectrum +2]] uses the same pinout as the UK [[ZX Spectrum 128|Spectrum 128]] with the exception of Lower pin 13 which is connected to the [[#IORQULA|{{overline|IORQGE}}]] input. | ||
==Notes on Connections== | ==Notes on Connections== | ||
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The {{overline|CK}} signal, sometimes referred to as PHICPU or ΦCPU is available on Lower Pin 8. This clock signal is generated by the [[The Spectrum ULA|ULA]] and is interrupted during [[contended memory]] access. | The {{overline|CK}} signal, sometimes referred to as PHICPU or ΦCPU is available on Lower Pin 8. This clock signal is generated by the [[The Spectrum ULA|ULA]] and is interrupted during [[contended memory]] access. | ||
On the [[ZX Spectrum | On the [[ZX Spectrum 128|UK 128]] the ULA clock pin is connected directly to the edge connector and is inverted by TR3 to drive the Z80. | ||
On the [[ZX Spectrum +2|+2]] the ULA clock pin is inverted by a NOT gate to generate the clock for the Z80. It is then inverted again by a second NOT gate to generate the edge connector {{overline|CK}}. | On the [[ZX Spectrum +2|+2]] the ULA clock pin is inverted by a NOT gate to generate the clock for the Z80. It is then inverted again by a second NOT gate to generate the edge connector {{overline|CK}}. | ||
The {{overline|CK}} signal is '''NOT''' connected on the [[Investronica]] [[ZX Spectrum | The {{overline|CK}} signal is '''NOT''' connected on the [[Investronica]] [[ZX Spectrum 128]]. | ||
===={{overline|IORQULA}}==== | ===={{overline|IORQULA}}==== | ||
Some schematics label Lower Pin 13 as {{overline|IORQULA}} or {{overline|IORQGA}}, however this pin is '''NOT''' connected on either the [[Investronica]] or Sinclair [[ZX Spectrum | Some schematics label Lower Pin 13 as {{overline|IORQULA}} or {{overline|IORQGA}}, however this pin is '''NOT''' connected on either the [[Investronica]] or Sinclair [[ZX Spectrum 128]]. It is connected on the [[ZX Spectrum +2]]. | ||
====Key Slot==== | ====Key Slot==== | ||
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====Removed Video Outputs==== | ====Removed Video Outputs==== | ||
Unlike the [[ZX Spectrum 16K/48K]] the [[ZX Spectrum | Unlike the [[ZX Spectrum 16K/48K]] the [[ZX Spectrum 128]] [[The Spectrum ULA|ULA]] generates RGB and Bright video signals rather than intensity and colour difference signals. The {{overline|Y}}, U, and V signals are therefore not available so the pins previously used for them are left unconnected. Additionally the composite video signal has been removed. | ||
[[Category:Edge connectors]] | [[Category:Edge connectors]] | ||
[[Category:Hardware]] | [[Category:Hardware]] | ||
[[Category:Spectrum]] | [[Category:Spectrum]] |