ZX Spectrum 128: Difference between revisions
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(Document PAL bugs and UK keypad voltage problem) |
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Reads from port 0x7ffd cause a crash, as the 128K's HAL10H8 chip does not distinguish between reads and writes to this port, resulting in a floating data bus being used to set the paging registers. | Reads from port 0x7ffd cause a crash, as the 128K's HAL10H8 chip does not distinguish between reads and writes to this port, resulting in a floating data bus being used to set the paging registers. | ||
Due to a bug either in the 128K's HAL10H8 chip or in the 128K PCB, memory banks 1, 3, 5 and 7 are contended (and the rest uncontended) as opposed to 4, 5, 6 and 7 as documented in the service manual. | Due to a bug either in the 128K's HAL10H8 chip or in the 128K PCB, memory banks 1, 3, 5 and 7 are contended (and the rest uncontended) as opposed to 4, 5, 6 and 7 as documented in the service manual. Whereas the +2 (with grey case) shares this behaviour, the +2A and +3 apply contention to pages 4–7 instead. The paging scheme documented in the manual would have been implemented as was (presumably) originally intended had the B0 and B2 inputs to the HAL10H8 been reversed, either on the 128K PCB or in the logic of the HAL itself. | ||
Later grey +2s were shipped with an updated HAL chip which corrects there issue whereby reads of port 0x7ffd would crash the machine[http://www.worldofspectrum.org/forums/discussion/35523]. It is not known whether this also updated the contention scheme to contend on pages 4–7. | Later grey +2s were shipped with an updated HAL chip which corrects there issue whereby reads of port 0x7ffd would crash the machine[http://www.worldofspectrum.org/forums/discussion/35523]. It is not known whether this also updated the contention scheme to contend on pages 4–7. | ||