ZX Spectrum 128: Difference between revisions
Jump to navigation
Jump to search
m (changing table css) |
m (→Paging) |
||
| Line 54: | Line 54: | ||
<!-- end of memory map --> | <!-- end of memory map --> | ||
Paging is controlled by performing I/O writes to ports 0x7ffd. | Paging is controlled by performing I/O writes to ports 0x7ffd. The paging logic decodes the address bus partially (uses A15 and A1 lines only), so the exact port is '''0xxx xxxx xxxx xx0x'''. | ||
The bits are described in the table below: | The bits are described in the table below: | ||