ZX Spectrum +2A/2B, +3/3B edge connector: Difference between revisions

ZX Spectrum +2A/2B, +3/3B edge connector (view source)

96 bytes removed , 12 November 2017

m

651

edits

@@ Line 8: / Line 8: @@
 ====CPU Clock====
-The CKEXT signal is available on Lower Pin 8. The CPU clock signal is generated by the [[The Amstrad gate array|gate array]] (IC1) and is interrupted during [[contended memory]] access. This clock signal is fed into the Z80 via a series resistor. The CKEXT signal is inverted in relation to the CPU clock as it has been passed through a NOT gate.
+The CKEXT signal is available on Lower Pin 8. The CPU clock signal is generated by the [[The Amstrad gate array|gate array]] (IC1) and is interrupted during [[contended memory]] access. The CKEXT signal is inverted in relation to the CPU clock input.
 ====Key Slot====