Anonymous

ZX Spectrum +2A/2B, +3/3B: Difference between revisions

From Sinclair Wiki
m
no edit summary
m (Use double-prime and avoid redirect)
mNo edit summary
Line 50: Line 50:


==Timings and Contention==
==Timings and Contention==
The contention and ram timings on the +3 and Black +2 differ significantly from earlier models due to the redesigned [[The Amstrad ASIC|gate array]]. Timing patterns and memory contention are described in detail in the [[Contended memory#Black +2 (+2A/B) and +3|contended memory]] article.
The contention and ram timings on the +3 and Black +2 differ significantly from earlier models due to the redesigned [[The Amstrad gate array|gate array]]. Timing patterns and memory contention are described in detail in the [[Contended memory#Black +2 (+2A/B) and +3|contended memory]] article.