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ZXI standard: Difference between revisions

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To have your device certified as ZXI compliant, you must apply for the required number of I/O ports in the range #hh3B. This can be done by posting a request to usenet's comp.sys.sinclair. An informal advisory committee will aim to assist you in choosing the appropriate ports in a timely fashion.
To have your device certified as ZXI compliant, you must apply for the required number of I/O ports in the range #hh3B. This can be done by posting a request to usenet's comp.sys.sinclair. An informal advisory committee will aim to assist you in choosing the appropriate ports in a timely fashion.


The following ports have been allocated:
The ports are assigned as follows


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<pre>
#FF3B - ULAplus data
#xF3B - ULAplus (see below)
#BF3B - ULAplus register
#xE3B - ZX Prism
#xE3B - ZX Prism
#xD3B - ZXI Hard Disk Interface Specification (working title)
#xC3B - Unassigned
#xB3B - Development/Testing. These ports should only be used during device development.
#xB3B - Development/Testing. These ports should only be used during device development.
#053B - Reserved
#xA3B - Unassigned
#043B - Reserved
#x93B - Unassigned
#x83B - Unassigned
#x73B - Unassigned
#x63B - Unassigned
#x53B - Unassigned
#x43B - Unassigned
#x03B, #x13B, #x23B, and #x33B are to be used in groups where a device needs four ports (for example Spectranet which has the 0x3B assignments)
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Currently Allocated #x03B, #x13B, #x23B, and #x33B Ports
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#033B - Spectranet page A memory select  
#033B - Spectranet page A memory select  
#023B - Spectranet page B memory select
#023B - Spectranet page B memory select
#013B - Spectranet programmable trap register
#013B - Spectranet programmable trap register
#003B - Spectranet control register
#003B - Spectranet control register
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Currently used ULAplus ports
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#FF3B - ULAplus data
#BF3B - ULAplus register
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