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ZX80/81 edge connector: Difference between revisions
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→Chip Select
m (overline above prime) |
m (→Chip Select) |
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{{Template:ZX80/81 edge connector|[[#Data Bus|D7′]]|[[#Chip Select|{{overline|RAMCS′}}]]|[[#Key Slot|SLOT]]|[[#Data Bus|D0′]]|[[#Data Bus|D1′]]|[[#Data Bus|D2′]]|[[#Data Bus|D6′]]|[[#Data Bus|D5′]]|[[#Data Bus|D3′]]|[[#Data Bus|D4′]]|{{overline|INT}}|{{overline|NMI}}|{{overline|HALT}}|{{overline|MREQ}}|{{overline|IORQ}}|{{overline|RD}}|{{overline|WR}}|{{overline|BUSAK}}|{{overline|WAIT}}|{{overline|BUSRQ}}|{{overline|RESET}}|{{overline|M1}}|{{overline|RFSH}}|[[#Power|+5{{small|V}}]]|[[#Power|+9{{small|V}}]]|[[#Key Slot|SLOT]]|0{{small|V}}|0{{small|V}}|[[#CPU Clock|{{overline|Φ}}]]|A0|A1|A2|A3|A15|A14|A13|A12|A11|A10|A9|A8|A7|A6|A5|A4|[[#Chip Select|{{overline|ROMCS′}}]]}} | {{Template:ZX80/81 edge connector|[[#Data Bus|D7′]]|[[#Chip Select|{{overline|RAMCS′}}]]|[[#Key Slot|SLOT]]|[[#Data Bus|D0′]]|[[#Data Bus|D1′]]|[[#Data Bus|D2′]]|[[#Data Bus|D6′]]|[[#Data Bus|D5′]]|[[#Data Bus|D3′]]|[[#Data Bus|D4′]]|{{overline|INT}}|{{overline|NMI}}|{{overline|HALT}}|{{overline|MREQ}}|{{overline|IORQ}}|{{overline|RD}}|{{overline|WR}}|{{overline|BUSAK}}|{{overline|WAIT}}|{{overline|BUSRQ}}|{{overline|RESET}}|{{overline|M1}}|{{overline|RFSH}}|[[#Power|+5{{small|V}}]]|[[#Power|+9{{small|V}}]]|[[#Key Slot|SLOT]]|0{{small|V}}|0{{small|V}}|[[#CPU Clock|{{overline|Φ}}]]|A0|A1|A2|A3|A15|A14|A13|A12|A11|A10|A9|A8|A7|A6|A5|A4|[[#Chip Select|{{overline|ROMCS′}}]]}} | ||
<!-- edge connector table ends --> | <!-- edge connector table ends --> | ||
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====Chip Select==== | ====Chip Select==== | ||
{{overline|RAMCS′}} and {{overline|ROMCS′}} are connected directly to the ROM and RAM chip select inputs. They are connected to the computer's logic via series resistors so that their value can be overridden by an external peripheral which is denoted by the prime symbol. | {{overline|RAMCS′}} and {{overline|ROMCS′}} are connected directly to the ROM and RAM chip select inputs. They are connected to the computer's logic via series resistors so that their value can be overridden by an external peripheral which is denoted by the prime symbol. | ||
The {{overline|ROMCS′}} signal is only present on the ZX81. On the ZX80 this pin is '''NOT''' connected. | |||
====CPU Clock==== | ====CPU Clock==== | ||
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* Lower Pin 1 is connected to the smoothed +5 volt DC output of the internal 7805 regulator. | * Lower Pin 1 is connected to the smoothed +5 volt DC output of the internal 7805 regulator. | ||
* Lower Pin 2 is connected to the +9 volt (nominal) unregulated DC power supply. | * Lower Pin 2 is connected to the +9 volt (nominal) unregulated DC power supply. | ||
[[Category:Edge connectors]] | |||
[[Category:Hardware]] | |||