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ZX80/81 edge connector: Difference between revisions
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(Created page with "Category:Edge Connectors Category:Hardware <!-- end of category list --> {{Template:ZX80/81_edge_connector|D7′|[[#Chip_Select|{{overline|RAMCS}}&prime...") |
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[[Category:Hardware]] | [[Category:Hardware]] | ||
<!-- end of category list --> | <!-- end of category list --> | ||
{{Template:ZX80/ | {{Template:ZX80/81 edge connector|[[#Data Bus|D7′]]|[[#Chip Select|{{overline|RAMCS}}′]]|[[#Key Slot|SLOT]]|[[#Data Bus|D0′]]|[[#Data Bus|D1′]]|[[#Data Bus|D2′]]|[[#Data Bus|D6′]]|[[#Data Bus|D5′]]|[[#Data Bus|D3′]]|[[#Data Bus|D4′]]|{{overline|INT}}|{{overline|NMI}}|{{overline|HALT}}|{{overline|MREQ}}|{{overline|IORQ}}|{{overline|RD}}|{{overline|WR}}|{{overline|BUSAK}}|{{overline|WAIT}}|{{overline|BUSRQ}}|{{overline|RESET}}|{{overline|M1}}|{{overline|RFSH}}|[[#Power|+5{{small|V}}]]|[[#Power|+9{{small|V}}]]|[[#Key Slot|SLOT]]|0{{small|V}}|0{{small|V}}|[[#CPU Clock|{{overline|Φ}}]]|A0|A1|A2|A3|A15|A14|A13|A12|A11|A10|A9|A8|A7|A6|A5|A4|[[#Chip Select|{{overline|ROMCS′}}]]}} | ||
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====Chip Select==== | ====Chip Select==== | ||
{{overline| | {{overline|RAMCS′}} and {{overline|ROMCS′}} are connected directly to the ROM and RAM chip select inputs. They are connected to the computer's logic via series resistors so that their value can be overridden by an external peripheral which is denoted by the prime symbol. | ||
====CPU Clock==== | ====CPU Clock==== | ||
The {{overline| | The {{overline|Φ}} signal is available on Lower Pin 6. This clock signal is inverted to provide the clock for the Z80. | ||
====Key Slot==== | ====Key Slot==== | ||
