162
edits
m (→4164) |
mNo edit summary |
||
Line 5: | Line 5: | ||
16Kx1 bit DRAM chip | 16Kx1 bit DRAM chip | ||
8 of this IC make the lower 16k part of the ZX | 8 of this IC make the lower 16k part of the [[ZX Spectrum 16K/48K]] RAM. | ||
e.g. NEC D416C-2 | e.g. NEC D416C-2 | ||
Line 48: | Line 48: | ||
The addressing logic uses 8 line (A<sub>0</sub> to A<sub>7</sub>) for row address (RAS) and 7 line (A<sub>0</sub> to A<sub>6</sub>) for column address (CAS). At CAS the A<sub>7</sub> line has to be fixed at logic 0 or 1 depending on chip type. | The addressing logic uses 8 line (A<sub>0</sub> to A<sub>7</sub>) for row address (RAS) and 7 line (A<sub>0</sub> to A<sub>6</sub>) for column address (CAS). At CAS the A<sub>7</sub> line has to be fixed at logic 0 or 1 depending on chip type. | ||
8 of this IC make the upper 32k part of the ZX | 8 of this IC make the upper 32k part of the [[ZX Spectrum 16K/48K|ZX Spectrum 48K]] RAM. | ||
e.g: | e.g: | ||
Line 95: | Line 95: | ||
64Kx1 bit DRAM chip | 64Kx1 bit DRAM chip | ||
16 of this IC make the 128K RAM of the [[ZX Spectrum 128K]] | 16 of this IC make the 128K RAM of the [[ZX Spectrum 128K]]. | ||
e.g:NEC D4164C-3 | e.g:NEC D4164C-3 |
edits