Difference between revisions of "Loading routine "cores""
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== Emulation ==
== Emulation ==
[://fuse-emulator.sourceforge.net/ Fuse] pattern matches for the above cores to implement its "accelerate loaders" feature.
Revision as of 13:17, 10 May 2020
This page documents the "core" of the loading routine used in the various turboloaders: the part of the loader which actually finds an edge from the tape.
The basis for every loading routine out there, this is the one found in the Spectrum ROM (at 05ED). The
LD-SAMPLE name is taken from Logan and O'Hara's The Complete Spectrum ROM Disassembly.
LD-SAMPLE INC B RET Z LD A,7F IN A,(FE) RRA RET NC XOR C AND 20 JR Z,LD-SAMPLE
The names given to each of these loading routines are not meant to imply that loaders was the first to use the specific loading loop; it is the most common usage of the loading loop, or just the first place that it was seen by the authors of this page.
LD-SAMPLE INC B RET Z LD A,7F IN A,(FE) RRA XOR C AND 20 JR Z,LD-SAMPLE
This is essentially identical to the ROM loader, but just without the
RET NC which aborts if space is pressed during the ROM loading routine.
LD-SAMPLE INC B JR NZ,LD-SAMPLE2 JP <somewhere else> LD-SAMPLE2 IN A,(FE) RRA RET Z XOR C AND 20 JR Z,LD-SAMPLE
This again isn't that different from the ROM loader; the minor changes are:
- Inverting the "no edge found" condition
- Using a
JPif an edge is not found rather than a
- Not setting the high byte of the
IN- this isn't critical as it affects only which keyboard half-rows are scanned
- Replacing the RET NC with a RET Z. I think this makes it essentially a no-op unless lots of keys are pressed at once.
LD-SAMPLE INC B JR NZ,LD-SAMPLE2 RET LD-SAMPLE2 IN A,(FE) RRA RET Z XOR C AND 20 JR Z,LD-SAMPLE
This actually makes the Alkatraz routine closer to the original ROM code as it now uses a
RET to exit in the "no edge found" case.
LD-SAMPLE INC B RET Z LD A,7F IN A,(FE) RRA NOP XOR C AND 20 JR Z,LD-SAMPLE
This is just the ROM routine, but with the "space pressed" check explicitly replaced with a
LD-SAMPLE INC B RET Z LD A,7F IN A,(FE) RRA AND A XOR C AND 20 JR Z,LD-SAMPLE
Another very close variant on the ROM loader, this time replacing the
RET NC with the
Used in some Ocean games, for example Chase H.Q..
LD-SAMPLE INC B RET Z LD A,7F IN A,(FE) RRA RET Z XOR C AND 20 JR Z,LD-SAMPLE
Again just a one-byte change from the ROM loader, replacing the
RET NC with Alkatraz's
LD-SAMPLE INC B RET Z LD A,FF IN A,(FE) RRA RET NC XOR C AND 20 JR Z,LD-SAMPLE
Yet another one-byte change from the ROM loader, this time ensuring that no keyboard half-rows are read, meaning the
RET NC will never trigger.
LD-SAMPLE INC B RET Z LD A,00 IN A,(FE) XOR C AND 40 RET C NOP JR Z,LD-SAMPLE
The first loader which is actually non-trivially different from the ROM loader. The changes here:
- Setting the high byte of the
INto be zero - this causes every keyboard half-row to be read. This is unimportant as all five low bits are masked out later.
- Dropping the
RRAof the ROM loader - as we're not checking for any keys being pressed, no need to shift the byte around. This means the EAR bit stays in bit 6 rather than being shifted to bit 5 so the
ANDchanges as well.
RET Cis a no-op as
ANDexplicitly clears the carry flag.
This code has fairly obviously been constructed to have exactly the same runtime as the ROM code, which explains the always failing
RET C and
NOP (which replaces the
RRA of the ROM routine). All the variants which replace the
RET NC with a
NOP or similar actually have a different runtime as a failing conditional
RET is the only Z80 instruction which takes 5 t-states.
"Variant" Search Loader
LD-SAMPLE INC B RET Z LD A,7F IN A,(FE) XOR C AND 40 JR Z,LD-SAMPLE
While this maintains the distinctive
AND 40 of the Search Loader, I suspect it's actually an independent derivation.
LD-SAMPLE DEC B RET Z IN A,(FE) XOR C AND 40 JP Z,LD-SAMPLE
This loader has two points of note: it inverts the counter (which just requires the flip of a condition outside this loop when working out whether it's a long or short pulse), and it's probably the minimal loop which is possible while still being anything even vaguely similar to the ROM loader.
Fuse pattern matches for the above cores to implement its "accelerate loaders" feature.