DRAMS: Difference between revisions
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== DRAMS == | == DRAMS == | ||
Dynamic Random Access Memories used in ZX | Dynamic Random Access Memories used in ZX Spectrum machines. | ||
===4116=== | ===4116=== | ||
16Kx1 bit DRAM chip | 16Kx1 bit DRAM chip | ||
8 of this IC make the lower 16k part of the ZX | 8 of this IC make the lower 16k part of the [[ZX Spectrum 16K/48K]] RAM. | ||
e.g. NEC D416C-2 | e.g. NEC D416C-2 | ||
| Line 11: | Line 11: | ||
Pinout: | Pinout: | ||
< | <div style="font-family:'Lucida Console', monospace"> | ||
{| | {| | ||
| style="text-align:right;" | | | style="text-align:right;" | | ||
| Line 41: | Line 41: | ||
V<sub>CC</sub> (+5V)<br> | V<sub>CC</sub> (+5V)<br> | ||
|} | |} | ||
</ | </div> | ||
===4532=== | ===4532=== | ||
| Line 48: | Line 48: | ||
The addressing logic uses 8 line (A<sub>0</sub> to A<sub>7</sub>) for row address (RAS) and 7 line (A<sub>0</sub> to A<sub>6</sub>) for column address (CAS). At CAS the A<sub>7</sub> line has to be fixed at logic 0 or 1 depending on chip type. | The addressing logic uses 8 line (A<sub>0</sub> to A<sub>7</sub>) for row address (RAS) and 7 line (A<sub>0</sub> to A<sub>6</sub>) for column address (CAS). At CAS the A<sub>7</sub> line has to be fixed at logic 0 or 1 depending on chip type. | ||
8 of this IC make the upper 32k part of the ZX | 8 of this IC make the upper 32k part of the [[ZX Spectrum 16K/48K|ZX Spectrum 48K]] RAM. | ||
e.g: | e.g: | ||
| Line 56: | Line 56: | ||
Pinout: | Pinout: | ||
< | <div style="font-family:'Lucida Console', monospace"> | ||
{| | {| | ||
| style="text-align:right;" | | | style="text-align:right;" | | ||
| Line 86: | Line 86: | ||
A<sub>7</sub><br> | A<sub>7</sub><br> | ||
|} | |} | ||
</ | </div> | ||
A<sub>7</sub> should set logical 0 at {{overline|CAS}} for TI TMS4532-20NL3 and OKI M3732-L chips, and logical 1 for TI TMS4532-20NL4 and OKI M3732-H chips. | A<sub>7</sub> should set logical 0 at {{overline|CAS}} for TI TMS4532-20NL3 and OKI M3732-L chips, and logical 1 for TI TMS4532-20NL4 and OKI M3732-H chips. | ||
| Line 95: | Line 95: | ||
64Kx1 bit DRAM chip | 64Kx1 bit DRAM chip | ||
16 of this IC make the 128K RAM of the ZX | 16 of this IC make the 128K RAM of the [[ZX Spectrum 128K]] and [[ZX Spectrum +2]] (except [[ZX Spectrum +2A/2B, +3/3B|ZX Spectrum +2A/2B]]). | ||
e.g:NEC D4164C-3 | e.g:NEC D4164C-3 | ||
| Line 101: | Line 101: | ||
Pinout: | Pinout: | ||
< | <div style="font-family:'Lucida Console', monospace"> | ||
{| | {| | ||
| style="text-align:right;" | | | style="text-align:right;" | | ||
| Line 131: | Line 131: | ||
A<sub>7</sub><br> | A<sub>7</sub><br> | ||
|} | |} | ||
</ | </div> | ||
===4464=== | |||
64Kx4 bit DRAM chip | |||
4 of this IC make the 128K RAM of the [[ZX Spectrum +2A/2B, +3/3B]]. | |||
e.g:MICRON MT4067-15 | |||
Pinout: | |||
<div style="font-family:'Lucida Console', monospace"> | |||
{| | |||
| style="text-align:right;" | | |||
{{overline|OE}}<br> | |||
DQ<sub>1</sub><br> | |||
DQ<sub>2</sub><br> | |||
{{overline|WE}}<br> | |||
{{overline|RAS}}<br> | |||
A<sub>6</sub><br> | |||
A<sub>5</sub><br> | |||
A<sub>4</sub><br> | |||
(+5V) V<sub>CC</sub> | |||
| style="border: 1px solid black" | | |||
1 ° 18<br> | |||
2 17<br> | |||
3 16<br> | |||
4 15<br> | |||
5 14<br> | |||
6 13<br> | |||
7 12<br> | |||
8 11<br> | |||
9 10<br> | |||
|| | |||
GND (0V)<br> | |||
DQ<sub>4</sub><br> | |||
{{overline|CAS}}<br> | |||
DQ<sub>3</sub><br> | |||
A<sub>0</sub><br> | |||
A<sub>1</sub><br> | |||
A<sub>2</sub><br> | |||
A<sub>3</sub><br> | |||
A<sub>7</sub><br> | |||
|} | |||
</div> | |||
[[Category:Hardware]] | |||
[[Category:Integrated Circuit]] | |||
Latest revision as of 10:10, 9 September 2018
DRAMS
Dynamic Random Access Memories used in ZX Spectrum machines.
4116
16Kx1 bit DRAM chip
8 of this IC make the lower 16k part of the ZX Spectrum 16K/48K RAM.
e.g. NEC D416C-2
Pinout:
|
(-5V) VEE |
1 ° 16 |
GND (0V) |
4532
32Kx1 bit DRAM chip
The addressing logic uses 8 line (A0 to A7) for row address (RAS) and 7 line (A0 to A6) for column address (CAS). At CAS the A7 line has to be fixed at logic 0 or 1 depending on chip type.
8 of this IC make the upper 32k part of the ZX Spectrum 48K RAM.
e.g: TI TMS4532-20NL3 or OKI M3732-L TI TMS4532-20NL4 or OKI M3732-H
Pinout:
|
NC |
1 ° 16 |
GND (0V) |
A7 should set logical 0 at CAS for TI TMS4532-20NL3 and OKI M3732-L chips, and logical 1 for TI TMS4532-20NL4 and OKI M3732-H chips.
The A7 line is omitted for refresh address.
4164
64Kx1 bit DRAM chip
16 of this IC make the 128K RAM of the ZX Spectrum 128K and ZX Spectrum +2 (except ZX Spectrum +2A/2B).
e.g:NEC D4164C-3
Pinout:
|
NC |
1 ° 16 |
GND (0V) |
4464
64Kx4 bit DRAM chip
4 of this IC make the 128K RAM of the ZX Spectrum +2A/2B, +3/3B.
e.g:MICRON MT4067-15
Pinout:
|
OE |
1 ° 18 |
GND (0V) |