Contended memory: Difference between revisions

On the 48K machine, the memory from 0x4000 to 0x7fff is contended. If the contended memory is accessed 14335<ref>In this document, we label the first tstate which ''begins'' with /INT low as tstate 0; some other resources label this tstate as tstate 1, which means that all tstate counts will be one greater. Note that this is purely a notational difference, and is ''not'' the same as the effect observed in the [[#Timing differences|timing differences]] section, which is a actual difference in behaviour between different machines; when using the notation which labels the first /INT low tstate as tstate 1, the first contended memory cycle is at either 14336 or 14337 tstates.</ref> or 14336 tstates after an interrupt (see the [[#Timing differences|timing differences]] section below for information on the 14335/14336 issue), the Z80 will be delayed for 6 tstates. After 14336 tstates, the delay is 5 tstates. The pattern continues as follows:

! Tstates

! Delay