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Contended memory: Difference between revisions
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On the 128K and +2 Spectrums, memory pages 1, 3, 5 and 7 are contended. This means that RAM from 0x4000 to 0x7fff is always contended (as memory page 5 is always mapped in there) and RAM from 0xc000 to 0xffff can be contended if page 1, 3, 5 or 7 is paged in there. The 128K and +2 Spectrums also have a different timing pattern from the 48K machine due to their different line and frame lengths: the 6,5,4,3,2,1,0,0 pattern starts 14361 tstates after interrupt, and repeats every 228 tstates rather than 224. | On the 128K and +2 Spectrums, memory pages 1, 3, 5 and 7 are contended. This means that RAM from 0x4000 to 0x7fff is always contended (as memory page 5 is always mapped in there) and RAM from 0xc000 to 0xffff can be contended if page 1, 3, 5 or 7 is paged in there. The 128K and +2 Spectrums also have a different timing pattern from the 48K machine due to their different line and frame lengths: the 6,5,4,3,2,1,0,0 pattern starts 14361 tstates after interrupt, and repeats every 228 tstates rather than 224. | ||
=== + | === Black +2 / +3 === | ||
The + | The Amstrad ASIC in the Black +2 / +3 differs more significantly in that it applies less contention than the 48K or 128K ULAs. Specifically, it applies contention only if the MREQ line is active, whereas the 48K ULA applies it under all circumstances. | ||
Unlike the the 128K or Grey +2 the Amstrad ASIC contends pages 4, 5, 6, and 7. | |||
In the [[#Instruction breakdown|instruction breakdown table]], contention patterns which differ on the +3 are shown in ''italics''. The timing pattern also differs significantly: | |||
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