Chloe 280SE: Difference between revisions
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(Created page with "Category:Hardware Category:Spectrum Category:Clones category:timex {{Infobox computer | cpu = Z804C0020 @ 3.5MHz / 21MHz | rom = 32kB | ram = 256kB | ramp...") |
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| manu = Specification only | | manu = Specification only | ||
| volume = None | | volume = None | ||
| resolution = | | resolution = 256×192 or 512×192 (hi-res) | ||
| colours = 256 (2 per | | colours = 256 (2 per 8×8 or 8×1 cell), or 2 (hi-res) | ||
}} | }} | ||
The Chloe 280SE | The Chloe 280SE was originally a reference specification for a production version of the [[ZX Spectrum SE]]. It had the following differences: | ||
* T-states are exactly as per the 48K Spectrum. | * T-states are exactly as per the 48K Spectrum. | ||
Line 21: | Line 21: | ||
* 32K of contended VRAM (page 5 and 7 in the HOME bank) | * 32K of contended VRAM (page 5 and 7 in the HOME bank) | ||
* No RAM contention when paging sideways RAM over the HOME bank. | * No RAM contention when paging sideways RAM over the HOME bank. | ||
* 32K Flash ROM (no TR-DOS traps, SE Basic is the default firmware). | * 32K Flash ROM (no TR-DOS traps, [[SE Basic IV]] is the default firmware). | ||
* ULAplus support in all video modes. | * ULAplus support in all video modes. | ||
* Z84C0020PEG CPU (software switchable between 3.5Mhz and 21Mhz). | * Z84C0020PEG CPU (software switchable between 3.5Mhz and 21Mhz). | ||
* YM219F PSG (software switchable stereo panning). | * YM219F PSG (software switchable stereo panning). | ||
It subsequently became an FPGA project not directly related to the ZX Spectrum. |
Latest revision as of 09:29, 23 August 2018
Infobox: Chloe 280SE
Manufacturer | Specification only |
Mfg. volume | None |
CPU | Z804C0020 @ 3.5MHz / 21MHz |
ROM | 32kB |
RAM | 256kB |
as pages | 64kB + 64kB + 128kB |
Gfx Res | 256×192 or 512×192 (hi-res) |
Gfx Colours | 256 (2 per 8×8 or 8×1 cell), or 2 (hi-res) |
The Chloe 280SE was originally a reference specification for a production version of the ZX Spectrum SE. It had the following differences:
- T-states are exactly as per the 48K Spectrum.
- 256K total RAM (no page 8 in the HOME bank, and no 8K serial RAM on the PSG)
- 224K of uncontended RAM (64K in each sideways bank, 96K in the HOME bank)
- 32K of contended VRAM (page 5 and 7 in the HOME bank)
- No RAM contention when paging sideways RAM over the HOME bank.
- 32K Flash ROM (no TR-DOS traps, SE Basic IV is the default firmware).
- ULAplus support in all video modes.
- Z84C0020PEG CPU (software switchable between 3.5Mhz and 21Mhz).
- YM219F PSG (software switchable stereo panning).
It subsequently became an FPGA project not directly related to the ZX Spectrum.